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150 mA, Low Quiescent Current, CMOS Linear Regulator ADP121
FEATURES
Input voltage range: 2.3 V to 5.5 V Output voltage range: 1.2 V to 3.3 V Output current: 150 mA Low quiescent current IGND = 11 A with 0 A load IGND = 30 A with 150 mA load Low shutdown current: <1 A Low dropout voltage 90 mV @ 150 mA load High PSRR 70 dB @ 1 kHz at VOUT = 1.2 V 70 dB @ 10 kHz at VOUT = 1.2 V Low noise: 40 V rms at VOUT = 1.2 V No noise bypass capacitor required Output voltage accuracy: 1% Stable with a small 1 F ceramic output capacitor 16 fixed output voltage options Current limit and thermal overload protection Logic controlled enable 5-lead TSOT package 4-ball 0.4 mm pitch WLCSP
TYPICAL APPLICATION CIRCUITS
VIN = 2.3V 1F
2 3 1
VIN GND
VOUT 5 1F
VOUT = 1.8V
NC = NO CONNECT
Figure 1. ADP121 TSOT with Fixed Output Voltage, 1.8 V
VIN = 2.3V 1F
VIN
VOUT 1F
VOUT = 1.8V
06901-001
EN
NC 4
EN
GND
Figure 2. ADP121 WLCSP with Fixed Output Voltage, 1.8 V
APPLICATIONS
Mobile phones Digital cameras and audio devices Portable and battery-powered equipment Post dc-to-dc regulation Post regulation
GENERAL DESCRIPTION
The ADP121 is a quiescent current, low dropout, linear regulators that operate from 2.3 V to 5.5 V and provide up to 150 mA of output current. The low 135 mV dropout voltage at 150 mA load improves efficiency and allows operation over a wide input voltage range. The low 30 A of quiescent current at full load make the ADP121 ideal for battery-operated portable equipment. The ADP121 is available in 16 fixed output voltage options ranging from 1.2 V to 3.3 V. The parts are optimized for stable operation with small 1 F ceramic output capacitors. The ADP121 delivers good transient performance with minimal board area. Short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. The ADP121 is available in a tiny 5-lead TSOT and 4-ball 0.4 mm pitch WLCSP packages and utilizes the smallest footprint solution to meet a variety of portable applications.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved.
06901-002
ADP121 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Typical Application Circuits............................................................ 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Data ................................................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 Typical Performance Characteristics ..............................................7 Theory of Operation ...................................................................... 11 Applications Information .............................................................. 12 Capacitor Selection .................................................................... 12 Undervoltage Lockout ............................................................... 13 Enable Feature ............................................................................ 13 Current Limit and Thermal Overload Protection ................. 14 Thermal Considerations............................................................ 14 Printed Circuit Board Layout Considerations ....................... 17 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 19
REVISION HISTORY
7/08--Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADP121 SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.3 V, whichever is greater; EN = VIN; IOUT = 10 mA; CIN = COUT = 1 F; TA = 25C, unless otherwise noted. Table 1.
Parameter INPUT VOLTAGE RANGE OPERATING SUPPLY CURRENT Symbol VIN IGND Conditions TJ = -40C to +125C IOUT = 0 A IOUT = 0 A, TJ = -40C to +125C IOUT = 10 mA IOUT = 10 mA, TJ = -40C to +125C IOUT = 150 mA IOUT = 150 mA, TJ = -40C to +125C EN = GND EN = GND, TJ = -40C to +125C IOUT = 10 mA 100 A < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V 100 A < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V TJ = -40C to +125C VIN = (VOUT + 0.5 V) to 5.5 V, IOUT = 1 mA TJ = -40C to +125C IOUT = 1 mA to 150 mA IOUT = 1 mA to 150 mA TJ = -40C to +125C VOUT = 3.3 V IOUT = 10 mA IOUT = 10 mA, TJ = -40C to +125C IOUT = 150 mA IOUT = 150 mA, TJ = -40C to +125C IOUT = 10 mA IOUT = 10 mA, TJ = -40C to +125C IOUT = 150 mA IOUT = 150 mA, TJ = -40C to +125C VOUT = 3.3 V Min 2.3 Typ 11 21 15 29 30 40 0.1 -1 -2 -3 1.5 +1 +2 +3 Max 5.5 Unit V A A A A A A A A % % %
SHUTDOWN CURRENT FIXED OUTPUT VOLTAGE ACCURACY
IGND-SD VOUT
REGULATION Line Regulation Load Regulation 1
VOUT/VIN VOUT/IOUT
-0.03 0.001
+0.03
%/ V %/mA %/mA
0.005
DROPOUT VOLTAGE 2 TSOT
VDROPOUT
8 12 120 180 6 9 90 135 160 120 225 150 15 1.2 0.4 0.05 1 2.25 1.5 120 65 52 40 350
WLCSP
START-UP TIME CURRENT-LIMIT THRESHOLD 4 THERMAL SHUTDOWN Thermal Shutdown Threshold Thermal Shutdown Hysteresis EN INPUT EN Input Logic High EN Input Logic Low EN Input Leakage Current UNDERVOLTAGE LOCKOUT Input Voltage Rising Input Voltage Falling Hysteresis OUTPUT NOISE
3
TSTART-UP ILIMIT TSSD TSSD-HYS VIH VIL VI-LEAKAGE UVLO UVLORISE UVLOFALL UVLOHYS OUTNOISE
mV mV mV mV mV mV mV mV s mA C C V V A
TJ rising
2.3 V VIN 5.5 V 2.3 V VIN 5.5 V EN = VIN or GND EN = VIN or GND, TJ = -40C to +125C
10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V 10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V 10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.2 V
V V mV V rms V rms V rms
Rev. 0 | Page 3 of 20
ADP121
Parameter POWER SUPPLY REJECTION RATIO Symbol PSRR Conditions 10 kHz, VIN = 5 V, VOUT = 3.3 V 10 kHz, VIN = 5 V, VOUT = 2.5 V 10 kHz, VIN = 5 V, VOUT = 1.2 V TJ = -40C to +125C TJ = -40C to +125C Min Typ 60 66 70 Max Unit dB dB dB F
INPUT AND OUTPUT CAPACITOR 5 Minimum Input and Output Capacitance Capacitor ESR
1 2
CAPMIN RESR
0.70 0.001
1
Based on an end-point calculation using 1 mA and 100 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA. Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.3 V. 3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value. 4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V. 5 The minimum input and output capacitance should be greater than 0.70 F over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. 0 | Page 4 of 20
ADP121 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter VIN to GND VOUT to GND EN to GND Storage Temperature Range Operating Junction Temperature Range Soldering Conditions Rating -0.3 V to +6 V -0.3 V to VIN -0.3 V to +6 V -65C to +150C -40C to +125C JEDEC J-STD-020
on PCB material, layout, and environmental conditions. The specified values of JA are based on a 4-layer, 4" x 3", circuit board. Refer to JESD 51-7 and JESD 51-9 for detailed information on the board construction. For additional information, see AN-617 Application Note, MicroCSPTM Wafer Level Chip Scale Package. JB is the junction-to-board thermal characterization parameter measured in C/W. JB is based on modeling and calculation using a four-layer board. The JESD51-12 Guidelines for Reporting and Using Package Thermal Information states that thermal characterization parameters are not the same as thermal resistances. JB measures the component power flowing through multiple thermal paths rather than a single path as in thermal resistance, JB. Therefore, JB thermal paths include convection from the top of the package as well as radiation from the package, factors that make JB more useful in realworld applications. Maximum TJ is calculated from the board temperature (TB) and PD using the following formula: TJ = TB + (PD x JB) Refer to JESD51-8 and JESD51-12 for more detailed information about JB.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in combination. The ADP121 can be damaged when the junction temperature limits are exceeded. Monitoring the ambient temperature does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. In applications with moderate power dissipation and low PCB thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. The junction temperature (TJ) of the device is dependent on the ambient temperature (TA), the power dissipation of the device (PD), and the junction-to-ambient thermal resistance of the package (JA). TJ is calculated from TA and PD using the following formula: TJ = TA + (PD x JA) Junction-to-ambient thermal resistance, JA, is based on modeling and calculation using a four-layer board. The junction-to-ambient thermal resistance is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of JA may vary, depending
THERMAL RESISTANCE
JA and JB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3.
Package Type 5-Lead TSOT 4-Ball 0.4 mm Pitch WLCSP JA 170 260 JB 43 58 Unit C/W C/W
ESD CAUTION
Rev. 0 | Page 5 of 20
ADP121 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
VIN 1 TOP VIEW GND 2 (Not to Scale)
06901-003
2 VOUT
5
VOUT
A
VIN
TOP VIEW (Not to Scale) B EN GND
06901-004
EN 3
4
NC
NC = NO CONNECT
Figure 3. 5-Lead TSOT Pin Configuration
Figure 4. 4-Ball WLCSP Pin Configuration
Table 4. Pin Function Descriptions
Pin No. TSOT WLCSP 1 A1 2 B2 3 B1 4 5 N/A A2 Mnemonic VIN GND EN NC VOUT Description Regulator Input Supply. Bypass VIN to GND with a 1 F or larger capacitor. Ground. Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. No Connect. Not connected internally. Regulated Output Voltage. Bypass VOUT to GND with a 1 F or greater capacitor.
Rev. 0 | Page 6 of 20
ADP121 TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA, CIN = COUT = 1 F, TA = 25C, unless otherwise noted.
1.804 1.802 1.800 1.798
VOUT (V)
40 VOUT = 1.8V VIN = 2.3V 35 30 25 20 15 10 5
06901-005
VOUT = 1.8V VIN = 2.3V
1.796 1.794 1.792 1.790 1.788 1.786 ILOAD = 10A ILOAD = 100A ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 150mA -40C -5C 25C TJ (C) 85C 125C
GROUND CURRENT (A)
-40C
-5C
25C TJ (C)
85C
125C
Figure 5. Output Voltage vs. Junction Temperature
Figure 8. Ground Current vs. Junction Temperature
1.806 VOUT = 1.8V VIN = 2.3V TA = 25C
35 30 VOUT = 1.8V VIN = 2.3V TA = 25C
1.804
GROUND CURRENT (A)
25 20 15 10 5 0 0.001
1.802
VOUT (V)
1.800
1.798
1.796
06901-006
0.01
0.1
1 ILOAD (mA)
10
100
1000
0.01
0.1
1 ILOAD (mA)
10
100
1000
Figure 6. Output Voltage vs. Load Current
1.806 VOUT = 1.8V TA = 25C 1.804
35 30
Figure 9. Ground Current vs. Load Current
GROUND CURRENT (A)
1.802
VOUT (V)
ILOAD = 10A ILOAD = 100A ILOAD = 1mA ILOAD = 10mA ILOAD = 50mA ILOAD = 100mA
VOUT = 1.8V TA = 25C
25 20 15 10 5 0 2.3 ILOAD = 10A ILOAD = 100A ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 150mA 2.7 3.1 3.5 3.9 VIN (V) 4.3 4.7 5.1 5.5
06901-010
1.800
1.798
1.796
2.7
3.1
3.5
3.9 VIN (V)
4.3
4.7
5.1
5.5
06901-007
1.794 2.3
Figure 7. Output Voltage vs. Input Voltage
Figure 10. Ground Current vs. Input Voltage
Rev. 0 | Page 7 of 20
06901-009
1.794 0.001
06901-008
0
ILOAD = 10A ILOAD = 100A ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 150mA
ADP121
0.35 0.30 VIN = 2.30 VIN = 2.50 VIN = 3.00 VIN = 3.50 VIN = 4.20 VIN = 5.50
140 TA = 25C 120 100
VDROPOUT (mV)
SHUTDOWN CURRENT (A)
0.25 0.20 0.15 0.10 0.05 0 -50
80 60 40 20 0 VOUT = 2.5V VOUT = 3.3V
06901-011
-25
0
25 50 75 TEMPERATURE (C)
100
125
1
10 ILOAD (mA)
100
1000
Figure 11. Shutdown Current vs. Temperature at Various Input Voltages
Figure 14. Dropout Voltage vs. Load Current, WLCSP
3.35
180 TA = 25C 160 140
3.30
VOUT = 3.3V TA = 25C
3.25
VOUT (V)
VDROPOUT (mV)
120 100 80 60 VOUT = 3.3V 40 20 1 10 ILOAD (mA) 100 1000
06901-018
3.20 VOUT @ 1mA VOUT @ 10mA VOUT @ 20mA VOUT @ 50mA VOUT @ 100mA VOUT @ 150mA 3.25 3.30 3.35 3.40 VIN (V) 3.45 3.50 3.55 3.60
06901-013 06901-020
VOUT = 2.5V
3.15
3.10
0
3.05 3.20
Figure 12. Dropout Voltage vs. Load Current, TSOT
3.35 VOUT = 3.3V TA = 25C
Figure 15. Output Voltage vs. Input Voltage (In Dropout), WLCSP
60 VOUT = 3.3V TA = 25C
3.30
50
GROUND CURRENT (A)
3.25
40
VOUT (V)
3.20 VOUT @ 1mA VOUT @ 10mA VOUT @ 20mA VOUT @ 50mA VOUT @ 100mA VOUT @ 150mA 3.25 3.30 3.35 3.40 VIN (V) 3.45 3.50 3.55 3.60
06901-019
30
3.15
20
3.10
10
3.05 3.20
ILOAD = 1mA ILOAD = 10mA ILOAD = 20mA 3.25 3.30
ILOAD = 50mA ILOAD = 100mA ILOAD = 150mA 3.35 3.40 VIN (V) 3.45 3.50 3.55 3.60
0 3.20
Figure 13. Output Voltage vs. Input Voltage (In Dropout), TSOT
Figure 16. Ground Current vs. Input Voltage (In Dropout)
Rev. 0 | Page 8 of 20
06901-012
ADP121
0 -10 -20 -30 VRIPPLE = 50mV VIN = 5V VOUT = 1.2V COUT = 1F 150mA 100mA 10mA 1mA 100A 0A 0 3.3V/150mA 3.3V/100A -20 1.2V/150mA 1.2V/100A 1.8V/150mA 1.8V/100A
-40
PSRR (dB)
PSRR (dB)
06901-014
-40 -50 -60 -70 -80 -90 100 1k
-60
-80
-100
10k 100k FREQUENCY (Hz)
1M
10M
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
Figure 17. Power Supply Rejection Ratio vs. Frequency
Figure 20. Power Supply Rejection Ratio vs. Frequency, at Various Output Voltages and Load Currents
10
0 -10 -20 -30 VRIPPLE = 50mV VIN = 5V VOUT = 1.8V COUT = 1F 150mA 100mA 10mA 1mA 100A 0A
1.2V 1.8V 3.3V 1
PSRR (dB)
-50 -60 -70 -80 -90
06901-015
(V/Hz)
-40
0.1
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
100
1k FREQUENCY (Hz)
10k
100k
Figure 18. Power Supply Rejection Ratio vs. Frequency
0 -10 -20 -30 VRIPPLE = 50mV VIN = 5V VOUT = 3.3V COUT = 1F 150mA 100mA 10mA 1mA 100A 0A
Figure 21. Output Noise Spectrum, VIN = 5 V, ILOAD = 10 mA, COUT = 1 F
70 60 50
PSRR (dB)
-40 -50 -60 -70 -80 -90
06901-016
OUTNOISE (V rms)
40 30 20 10 0 0.001 3.3V 2.5V 1.8V 1.5V 1.2V 0.01 0.1 1 ILOAD (mA) 10 100 1000
06901-022
-100 10
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
Figure 19. Power Supply Rejection Ratio vs. Frequency
Figure 22. Output Noise vs. Load Current and Output Voltage, VIN = 5 V, COUT = 1 F
Rev. 0 | Page 9 of 20
06901-021
-100 10
0 10
06901-017
-100 10
-120 10
ADP121
(150mA/DIV)
1mA TO 150mA LOAD STEP, 2.5A/s ILOAD
ILOAD
(1V/DIV)
4V TO 5V INPUT VOLTAGE STEP, 2V/s
VOUT
(50mV/DIV)
(10mV/DIV)
VOUT
06901-024
(40s/DIV)
(4s/DIV)
Figure 23. Load Transient Response, CIN = COUT = 1 F
Figure 25. Line Transient Response, Load Current = 150 mA
(150mA/DIV)
(1V/DIV)
1mA TO 150mA LOAD STEP, 2.5A/s
ILOAD
ILOAD 4V TO 5V INPUT VOLTAGE STEP, 2V/s
VOUT = 1.8V, CIN = COUT = 1F
(50mV/DIV)
(10mV/DIV)
VOUT
VOUT
06901-025
(40s/DIV)
(10s/DIV)
Figure 24. Load Transient Response, CIN = COUT = 4.7 F
Figure 26. Line Transient Response, Load Current = 1 mA
Rev. 0 | Page 10 of 20
06901-038
VIN = 5V VOUT = 1.8V
06901-037
VIN = 5V VOUT = 1.8V
VOUT = 1.8V, CIN = COUT = 1F
ADP121 THEORY OF OPERATION
The ADP121 is a low quiescent current, low dropout linear regulators that operate from 2.3 V to 5.5 V and provide up to 150 mA of output current. Drawing a low 30 A quiescent current (typical) at full load makes the ADP121 ideal for batteryoperated portable equipment. Shutdown current consumption is typically 100 nA. Optimized for use with small 1 F ceramic capacitors, the ADP121 provides excellent transient performance.
VIN R1 GND SHORT CIRCUIT, UVLO, AND THERMAL PROTECT VOUT
Internally, the ADP121 consists of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to flow and increasing the output voltage. If the feedback voltage is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to flow and decreasing the output voltage. The ADP121 is available in 16 output voltage options ranging from 1.2 V to 3.3 V. The ADP121 uses the EN pin to enable and disable the VOUT pin under normal operating conditions. When EN is high, VOUT turns on; when EN is low, VOUT turns off. For automatic startup, EN can be tied to VIN.
Figure 27. Internal Block Diagram
Rev. 0 | Page 11 of 20
06901-023
EN
SHUTDOWN
0.8V REFERENCE
R2
ADP121 APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP121 is designed for operation with small, space-saving ceramic capacitors, but functions with most commonly used capacitors as long as care is taken with the effective series resistance (ESR) value. The ESR of the output capacitor affects stability of the LDO control loop. A minimum of 0.70 F capacitance with an ESR of 1 or less is recommended to ensure stability of the ADP121. The transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP121 to large changes in the load current. Figure 28 and Figure 29 show the transient responses for output capacitance values of 1 F and 4.7 F, respectively.
ILOAD
(150mA/DIV)
Input Bypass Capacitor
Connecting a 1 F capacitor from VIN to GND reduces the circuit sensitivity to the printed circuit board (PCB) layout, especially when long input traces or high source impedance is encountered. If output capacitance greater than 1 F is required, the input capacitor should be increased to match it.
Input and Output Capacitor Properties
Any good quality ceramic capacitor can be used with the ADP121, as long as it meets the minimum capacitance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with a different behavior over temperature and applied voltage. Capacitors must have an adequate dielectric to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended. Y5V and Z5U dielectrics are not recommended, due to their poor temperature and dc bias characteristics. Figure 30 depicts the capacitance vs. voltage bias characteristic of an 0402 1 F, 10 V, X5R capacitor. The voltage stability of a capacitor is strongly influenced by the capacitor size and voltage rating. In general, a capacitor in a larger package or higher voltage rating exhibits better stability. The temperature variation of the X5R dielectric is about 15% over the -40C to +85C temperature range and is not a function of package or voltage rating.
1.2
1mA TO 150mA LOAD STEP, 2.5A/s CH1 MEAN 115.7mA
(50mV/DIV)
06901-039
VOUT = 1.8V, CIN = COUT = 1F
VOUT
(400ns/DIV)
1.0
CAPACITANCE (F)
Figure 28. Output Transient Response, COUT = 1 F
0.8
ILOAD
(150mA/DIV)
0.6
1mA TO 150mA LOAD STEP, 2.5A/s
0.4
0.2
0
2
(50mV/DIV)
4 6 VOLTAGE (V)
8
10
VOUT
Figure 30. Capacitance vs. Voltage Bias Characteristic
(400ns/DIV)
Figure 29. Output Transient Response, COUT = 4.7 F
06901-040
VOUT = 1.8V, CIN = COUT = 4.7F
Rev. 0 | Page 12 of 20
06901-036
0
ADP121
Equation 1 can be used to determine the worst-case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage. CEFF = CBIAS x (1 - TEMPCO) x (1 - TOL) where: CBIAS is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. In this example, TEMPCO over -40C to +85C is assumed to be 15% for an X5R dielectric. TOL is assumed to be 10%, and CBIAS is 0.94 F at 1.8 V from the graph in Figure 30. Substituting these values in Equation 1 yields CEFF = 0.94 F x (1 - 0.15) x (1 - 0.1) = 0.719 F Therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the LDO over temperature and tolerance at the chosen output voltage. To guarantee the performance of the ADP121, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors are evaluated for each application. (1) As shown in Figure 31, the EN pin has built in hysteresis. This prevents on/off oscillations that may occur due to noise on the EN pin as it passes through the threshold points. The active/inactive thresholds of the EN pin are derived from the VIN voltage. Therefore, these thresholds vary with changing input voltage. Figure 32 shows typical EN active/inactive thresholds when the input voltage varies from 2.3 V to 5.5 V.
1.10 1.05
TYPICAL EN THRESHOLDS (V)
1.00 EN ACTIVE 0.95 0.90 0.85 0.80 0.75 0.70 2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 VIN (V)
06901-027
EN INACTIVE
UNDERVOLTAGE LOCKOUT
The ADP121 has an internal undervoltage lockout circuit that disables all inputs and the output when the input voltage is less than approximately 2.2 V. This ensures that the inputs of the ADP121 and the output behave in a predictable manner during power-up.
Figure 32. Typical EN Pin Thresholds vs. Input Voltage
ENABLE FEATURE
The ADP121 uses the EN pin to enable and disable the VOUT pin under normal operating conditions. Figure 31 shows a rising voltage on EN crossing the active threshold, and then VOUT turns on. When a falling voltage on EN crosses the inactive threshold, VOUT turns off.
The ADP121 utilizes an internal soft start to limit the inrush current when the output is enabled. The start-up time for the 1.8 V option is approximately 120 s from the time the EN active threshold is crossed to when the output reaches 90% of its final value. The start-up time is somewhat dependant on the output voltage setting and increases slightly as the output voltage increases.
6 EN 5
4
VOLTAGE (V)
VIN = 5V VOUT = 1.8V CIN = COUT = 1F ILOAD = 100mA
3 3.3V 2 1.8V
VOUT
500mV/DIV
1
EN
1.2V
0
20
40
60
80
100 (s)
120
140
160
180
200
Figure 33. Typical Start-Up Time
40ms/DIV
Figure 31. ADP121 Typical EN Pin Operation
06901-026
Rev. 0 | Page 13 of 20
06901-041
0
ADP121
CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION
The ADP121 is protected against damage due to excessive power dissipation by current and thermal overload protection circuits. The ADP121 is designed to current limit when the output load reaches 225 mA (typical). When the output load exceeds 225 mA, the output voltage is reduced to maintain a constant current limit. Thermal overload protection is built-in, which limits the junction temperature to a maximum of 150C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature starts to rise above 150C, the output is turned off, reducing the output current to zero. When the junction temperature drops below 135C, the output is turned on again and output current is restored to its nominal value. Consider the case where a hard short from VOUT to GND occurs. At first, the ADP121 current limits, so that only 225 mA is conducted into the short. If self-heating of the junction is great enough to cause its temperature to rise above 150C, thermal shutdown activates turning off the output and reducing the output current to zero. As the junction temperature cools and drops below 135C, the output turns on and conducts 225 mA into the short, again causing the junction temperature to rise above 150C. This thermal oscillation between 135C and 150C causes a current oscillation between 225 mA and 0 mA that continues as long as the short remains at the output. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For reliable operation, device power dissipation must be externally limited so junction temperatures do not exceed 125C. temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistances between the junction and ambient air (JA). The JA number is dependent on the package assembly compounds used and the amount of copper to which the GND pins of the package are soldered on the PCB. Table 5 shows typical JA values for various PCB copper sizes and Table 6 shows the typical JB values for the ADP121. Table 5. Typical JA Values
Copper Size (mm2) 01 50 100 300 500
1
TSOT (C/W) 170 152 146 134 131
WLCSP (C/W) 260 159 157 153 151
Device soldered to minimum size pin traces.
Table 6. Typical JB Values
TSOT (C/W) 42.8 WLCSP (C/W) 58.4
The junction temperature of the ADP121 can be calculated from the following equation: TJ = TA + (PD x JA) where: TA is the ambient temperature. PD is the power dissipation in the die, given by PD = [(VIN - VOUT) x ILOAD] + (VIN x IGND) where: ILOAD is the load current. IGND is the ground current. VIN and VOUT are input and output voltages, respectively. Power dissipation due to ground current is quite small and can be ignored. Therefore, the junction temperature equation simplifies to TJ = TA + {[(VIN - VOUT) x ILOAD] x JA} (4) As shown in Equation 4, for a given ambient temperature, input-to-output voltage differential, and continuous load current, there exists a minimum copper size requirement for the PCB to ensure that the junction temperature does not rise above 125C. Figure 34 to Figure 47 show junction temperature calculations for different ambient temperatures, load currents, VIN-to-VOUT differentials, and areas of PCB copper. In cases where the board temperature is known, the thermal characterization parameter, JB, can be used to estimate the junction temperature rise. TJ is calculated from TB and PD using the formula TJ = TB + (PD x JB) (5) (3) (2)
THERMAL CONSIDERATIONS
In most applications, the ADP121 does not dissipate a lot of heat due to high efficiency. However, in applications with a high ambient temperature and high supply voltage to an output voltage differential, the heat dissipated in the package is large enough that it can cause the junction temperature of the die to exceed the maximum junction temperature of 125C. When the junction temperature exceeds 150C, the converter enters thermal shutdown. It recovers only after the junction temperature has decreased below 135C to prevent any permanent damage. Therefore, thermal analysis for the chosen application is very important to guarantee reliable performance over all conditions. The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to the power dissipation, as shown in Equation 2. To guarantee reliable operation, the junction temperature of the ADP121 must not exceed 125C. To ensure that the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction
Rev. 0 | Page 14 of 20
ADP121
140 MAX JUNCTION TEMPERATURE 120 100 80 60 40 20 0 0.5 140 MAX JUNCTION TEMPERATURE 120 100 80 60 40 20 0 0.5 LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT 1.0 1.5 = 1mA = 10mA = 25mA = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA
06901-031 06901-033 06901-032
JUNCTION TEMPERATURE, TJ (C)
06901-028
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT
= 1mA = 10mA = 25mA = 50mA = 75mA = 100mA = 150mA
1.0
1.5
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
Figure 34. TSOT, 500 mm2 of PCB Copper, TA = 25C
140 MAX JUNCTION TEMPERATURE 120 100 80 60 40 20 0 0.5 140
Figure 37. TSOT, 500 mm2 of PCB Copper, TA = 50C
MAX JUNCTION TEMPERATURE
JUNCTION TEMPERATURE, TJ (C)
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 25mA LOAD CURRENT = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA
120 100 80 60 40 20 0 0.5 LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT 1.0 1.5 = 1mA = 10mA = 25mA = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA 3.5 4.0 4.5
06901-029
1.0
1.5
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
2.0 2.5 3.0 VIN - VOUT (V)
Figure 35. TSOT, 100 mm2 of PCB Copper, TA = 25C
140 120 100 80 60 40 20 0 0.5 140
Figure 38. TSOT, 100 mm2 of PCB Copper, TA = 50C
MAX JUNCTION TEMPERATURE
MAX JUNCTION TEMPERATURE
JUNCTION TEMPERATURE, TJ (C)
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 25mA LOAD CURRENT = 50mA
120 100 80 60 40 20 0 0.5 LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT 1.0 1.5 = 1mA = 10mA = 25mA = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA
LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA 1.0 1.5 2.0 2.5 3.0 VIN - VOUT (V) 3.5 4.0 4.5
06901-030
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
Figure 36. TSOT, 0 mm2 of PCB Copper, TA = 25C
Figure 39. TSOT, 0 mm2 of PCB Copper, TA = 50C
Rev. 0 | Page 15 of 20
ADP121
140 120 100 80 60 40 20 0 0.5 MAX JUNCTION TEMPERATURE 140 MAX JUNCTION TEMPERATURE 120 100 80 60 40 20 0 0.5 LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT 1.0 1.5 = 1mA = 10mA = 25mA = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA
06901-045 06901-047 06901-046
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT = 100mA LOAD CURRENT = 150mA 1.0 1.5 2.0 2.5 3.0 VIN - VOUT (V) 3.5 4.0 4.5
06901-042
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 25mA LOAD CURRENT = 50mA LOAD CURRENT = 75mA
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
Figure 40. WLCSP, 500 mm2 of PCB Copper, TA = 25C
Figure 43. WLCSP, 500 mm2 of PCB Copper, TA = 50C
140 120 100 80 60 40 20 0 0.5
140 MAX JUNCTION TEMPERATURE MAX JUNCTION TEMPERATURE 120 100 80 60 40 20 0 0.5 LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT 1.0 1.5 = 1mA = 10mA = 25mA = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT = 100mA LOAD CURRENT = 150mA
06901-043
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 25mA LOAD CURRENT = 50mA LOAD CURRENT = 75mA
1.0
1.5
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
Figure 41. WLCSP, 100 mm2 of PCB Copper, TA = 25C
Figure 44. WLCSP, 100 mm2 of PCB Copper, TA = 50C
140 120 100 80 60 40 20 0 0.5
MAX JUNCTION TEMPERATURE
140 120 100 80 60 40 20 0 0.5
MAX JUNCTION TEMPERATURE
JUNCTION TEMPERATURE, TJ (C)
JUNCTION TEMPERATURE, TJ (C)
LOAD CURRENT = 1mA LOAD CURRENT = 10mA
LOAD CURRENT = 25mA LOAD CURRENT = 50mA LOAD CURRENT = 75mA 1.0 1.5
LOAD CURRENT = 100mA LOAD CURRENT = 150mA 3.5 4.0 4.5
06901-044
LOAD CURRENT LOAD CURRENT LOAD CURRENT LOAD CURRENT 1.0 1.5
= 1mA = 10mA = 25mA = 50mA
LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA
2.0 2.5 3.0 VIN - VOUT (V)
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
Figure 42. WLCSP, 0 mm2 of PCB Copper, TA = 25C
Figure 45. WLCSP, 0 mm2 of PCB Copper, TA = 50C
Rev. 0 | Page 16 of 20
ADP121
140 120 100
GND
ANALOG DEVICES ADP121-xx-EVALZ
GND
JUNCTION TEMPERATURE, TJ (C)
C1
80 60 40 20 0 0.5 LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 25mA LOAD CURRENT = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA MAX JUNCTION TEMPERATURE
C2 U1
J1 VIN VOUT
06901-048
1.0
1.5
2.0 2.5 3.0 VIN - VOUT (V)
3.5
4.0
4.5
Figure 46. TSOT, 100 mm2 of PCB Copper, TA = 85C
140 120 100 80
06901-034 06901-035
GND
EN
GND
JUNCTION TEMPERATURE, TJ (C)
Figure 48. Example of TSOT PCB Layout
ADP121CB-xx-EVALZ
60 40 20 0 0.5 LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 25mA LOAD CURRENT = 50mA LOAD CURRENT = 75mA LOAD CURRENT = 100mA LOAD CURRENT = 150mA MAX JUNCTION TEMPERATURE 1.0 1.5 2.0 2.5 3.0 VIN - VOUT (V) 3.5 4.0 4.5
06901-049
J1
VIN
C1
U1
WLC SP
C2
VOUT
GND EN
GND
Figure 47. WLCSP, 100 mm2 of PCB Copper, TA = 85C
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP121. However, as can be seen from Table 5 and Table 6, a point of diminishing returns is eventually reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. Place the input capacitor as close as possible to the VIN and GND pins. Place the output capacitor as close as possible to the VOUT and GND pins. Use 0402 or 0603 size capacitors and resistors to achieve the smallest possible footprint solution on boards where area is limited.
Figure 49. Example of WLCSP PCB Layout
Rev. 0 | Page 17 of 20
ADP121 OUTLINE DIMENSIONS
2.90 BSC
5 4
1.60 BSC
1 2 3
2.80 BSC
PIN 1 0.95 BSC *0.90 0.87 0.84 1.90 BSC
*1.00 MAX
0.20 0.08 8 4 0 0.60 0.45 0.30
0.10 MAX
0.50 0.30
SEATING PLANE
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 50. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions show in millimeters
A1 BALL CORNER
0.860 0.820 SQ 0.780
0.660 0.600 0.540 SEATING PLANE 0.280 0.260 0.240 0.40 BALL PITCH
2 1 A
B
TOP VIEW
(BALL SIDE DOWN)
Figure 51. 4-Ball Wafer Level Chip Scale- Package [WLCSP] (CB-4-2) Dimensions show in millimeters
Rev. 0 | Page 18 of 20
101507-A
0.230 0.200 0.170
BOTTOM VIEW
(BALL SIDE UP)
0.050 NOM COPLANARITY
ADP121
ORDERING GUIDE
Model ADP121-AUJZ28R7 1 ADP121-AUJZ30R71 ADP121-AUJZ33R71 ADP121-ACBZ12R71 ADP121-ACBZ15R71 ADP121-ACBZ155R71 ADP121-ACBZ16R71 ADP121-ACBZ165R71 ADP121-ACBZ17R71 ADP121-ACBZ175R71 ADP121-ACBZ18R71 ADP121-ACBZ188R71 ADP121-ACBZ20R71 ADP121-ACBZ25R71 ADP121-ACBZ278R71 ADP121-ACBZ28R71 ADP121-ACBZ29R71 ADP121-ACBZ30R71 ADP121-ACBZ33R71 ADP121-3.3-EVALZ1 ADP121-3.0-EVALZ1 ADP121-2.8-EVALZ1 ADP121CB-3.3-EVALZ1 ADP121CB-3.0-EVALZ1 ADP121CB-2.8-EVALZ1 ADP121CB-2.0-EVALZ1 ADP121CB-1.8-EVALZ1
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Output Voltage (V) 2.8 3.0 3.3 1.2 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.875 2.0 2.5 2.775 2.8 2.9 3.0 3.3 3.3 3.0 2.8 3.3 3.0 2.8 2.0 1.8
Package Description 5-Lead TSOT 5-Lead TSOT 5-Lead TSOT 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP 4-Ball WLCSP ADP121 3.3 V Output Evaluation Board ADP121 3.0 V Output Evaluation Board ADP121 2.8 V Output Evaluation Board ADP121-1 3.3 V Output Evaluation Board ADP121-1 3.0 V Output Evaluation Board ADP121-1 2.8 V Output Evaluation Board ADP121-1 2.0 V Output Evaluation Board ADP121-1 1.8 V Output Evaluation Board
Package Option UJ-5 UJ-5 UJ-5 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2 CB-4-2
Branding LA3 LA4 LA5 LC0 LC1 LC2 LC3 LC4 LC5 LC6 LC7 LC8 LC9 LCA LCC LCD LCE LCF LCG
Z = RoHS Compliant Part.
Rev. 0 | Page 19 of 20
ADP121 NOTES
(c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06901-0-7/08(0)
Rev. 0 | Page 20 of 20

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